Oracle
Sr CAD Engineer - PDV
San Francisco Bay Area, US - Semiconductors, Computer Hardware
Sr CAD Engineer - PDV
Oracle Corporation
Santa Clara, CA
As a senior member of our CAD team, you will be responsible for architecting, developing, maintaining and enhancing physical design verification flows. In this role, you will work with various technology nodes, and develop flows for the different tool sets. Working alongside a small CAD team, you will be interfacing with cross-functional teams, including custom and digital design teams to ensure a solid chip design.
Description
- You will utilize your deep understanding of design rule check runsets and LVS runsets, writing them from scratch and/or modification of existing ones.
- Development, enhancement and maintenance of methodology flows for all aspects of physical design verification.
- Coordination of efforts of validating the flows, enhancing for custom checks and data generation.
- Interacting with the Design Team and PD teams to facilitate the chip design process.
No salary provided
Posted July 23, 2014 at 03:27PM from LinkedIn http://ift.tt/1kVaQj0
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